1. Field of the Invention
The present invention relates to an insulated gate semiconductor device, and particularly to an insulated gate semiconductor device having an improved electrostatic discharge tolerance.
2. Description of the Related Art
In a conventional insulated gate semiconductor device (for example, a metal oxide semiconductor field effect transistor (MOSFET)), a protection diode is connected between a gate electrode and a source electrode and a protection resistor is connected to the gate electrode, in order to protect a thin gate insulating film (oxide film) against electrostatic discharge (hereinafter, ESD).
FIG. 20 is a plan view showing a conventional MOSFET.
A large number of MOSFET cells 36 are disposed in an operating region 35. Gate electrodes of the cells 36 are drawn out to the outside of the operating region 35 through a gate connection electrode 34, and are connected to a gate pad electrode 31. A protection diode 32 and a MOSFET 50 are integrated on the same chip.
The protection diode 32 is disposed under the gate pad electrode 31. The protection diode 32 is a bidirectional Zener diode formed of multiple pn junction diodes connected to each other. One end of the protection diode 32 is connected to a source electrode (unillustrated) that covers all the cells 36, while the other end is connected to the gate pad electrode 31. This technology is described for instance in Japanese Patent Application Publication No. 2002-43574.
The conventional protection diode 32 has a single circle shape in which the multiple circular pn junctions having different distances (radii) from the center are concentrically formed. The protection diode 32 having approximately the same size (area) as the gate pad electrode 31 is disposed under the gate pad electrode 31.
One of known methods of increasing the ESD tolerance of MOSFET is to increase the total area of pn junctions constituting the protection diode. However, the increase in the partial or total junction area of the concentrically formed multiple pn junctions increases the area occupied by the protection diode on the chip.
Accordingly, as compared with a normal chip in the same size without its junction area being increased, the chip with its junction area increased has a small the operating region and therefore has high on-state resistance of the MOSFET. On the other hand, when the chip with its junction area increased is formed with the same area for the operation region as the normal chip, the chip size is increased.